As devices such as semiconductor devices, memory devices, and other devices scale to smaller dimensions, the ability to process increasingly smaller structures becomes challenging. In the fabrication of devices such as memory or logic devices cavities such as trenches or vias may be formed within a given layer or material and may be subsequently filled with another material. For example, a trench may be formed within a silicon layer and may subsequently be filled with an insulator material such as silicon oxide or silicon nitride.
Known methods for filling trenches include chemical vapor deposition, such as high density plasma (HDP) chemical vapor deposition (CVD). The HDPCVD process may entail performing chemical vapor deposition using multiple species, including, for example, silane, argon, oxygen (for oxide), or NH3 (for nitride). The HDPCVD process may include species whose role is to deposit material as well as species to at least partially etch material. When used to fill a trench, the HDPCVD process may provide gas molecules such as argon as ionized species impacting the trench region. Species such as silane and oxygen may be additionally provided to deposit dielectric material within the trench. The dielectric material deposited on the surface of the trench may simultaneously be subject to sputter-etching from argon species, where filling of the trench includes deposition and etching. As trenches scale to smaller dimensions, and are formed having higher aspect ratios (trench depth (height)/trench width), the HDPCVD process may be ineffective in providing an ideal structure of the trench to be filled. For example, facets may form as the trench is filled. Additionally, growth on sidewalls of depositing material, as well as redeposition from sputtering of material may result in material overhang along sidewalls. This process may result in what is termed pinch off, and the resultant formation of buried voids within a trench.
With respect to these and other considerations, the present disclosure is provided.